Catto / Topic Map · Computer Science I Level 1
Computer Science I · 120 h · Topic 1 of 6

Structure of a computer system

Before writing a line of code, it pays to know what machine you are writing for: what parts it has, how it fetches and executes each instruction, where it keeps its data and what makes it fast.

Von Neumann Instruction cycle Memory Buses Performance

01A computer is a stack of machines

Nobody programs a computer “as a whole.” You program the machine that the layer below offers. Someone writing in C sees a machine that understands functions and variables; the compiler translates it into the machine that understands instructions; the processor executes each instruction with digital circuits, and those circuits are transistors that switch. Each layer hides the details of the next one and offers something easier to use. This idea is called abstraction, and it is the most important tool in all of computing.

LayerWhat is visible from thereWho works on it
ApplicationWindows, files, the problem’s dataThe user and the application programmer
High-level languageVariables, functions, structures (C, Python)The programmer
Operating systemProcesses, virtual memory, files, devicesThe system kernel
Instruction set architecture (ISA)Registers, instructions, addressing modesThe compiler and the assembler
MicroarchitectureControl unit, ALU, cache, pipeliningThe processor designer
Digital logicGates, flip-flops, registers, addersDigital design
DevicesMOS transistors that switchElectronics
The most important boundary

The instruction set architecture (ISA) is the contract between software and hardware: the list of instructions, the visible registers and the way memory is accessed. Everything above it can change without touching the processor, and the processor can be redesigned internally without breaking the software, as long as the contract is respected. That is why a program compiled for x86 twenty years ago still runs on a current processor.

This course works in the middle layers: how data is represented, how an algorithm is conceived and how to write in C while knowing what the machine does with it. The lower layers are covered in more detail in combinational logic and in microprocessor architecture.

02The von Neumann model

In 1945 John von Neumann described, in the first draft report on the EDVAC, the organization that almost all computers still use. The central idea is the stored program: instructions are not wired in; they are kept in the same memory as the data, as numbers. Changing programs means changing the contents of memory.

CPU Control unit ALU arithmetic & logic Registers PC · IR · accumulator · flags Memory instructions and data together Input / output keyboard, display, ports address bus data bus control bus
The three von Neumann blocks and the three buses that join them. The CPU puts an address on the address bus, indicates on the control bus whether it is reading or writing, and the data travels on the data bus.
  • Central processing unit (CPU). The control unit fetches the instructions and interprets them; the arithmetic logic unit (ALU) does the calculations; the registers are the internal memory, small and very fast.
  • Main memory. An array of numbered cells. The number of each cell is its address and what it stores is its contents: two things that must never be confused.
  • Input/output. The paths to the outside world.
  • Buses. Sets of shared lines. The address bus always runs from the CPU outward; the data bus is bidirectional.
Von Neumann and Harvard

Sharing one memory for instructions and data is simple, but it creates a bottleneck: the CPU cannot fetch the next instruction and a data item at the same time. The Harvard architecture uses two memories with separate buses. AVR and PIC microcontrollers are Harvard: the program lives in flash and the data in RAM. PC processors are von Neumann on the outside, but inside they have separate instruction and data caches, which is a form of Harvard.

03The instruction cycle, step by step

The CPU always repeats the same thing, billions of times per second:

  1. Fetch (also called instruction fetch): it copies the value of the program counter (PC) into the memory address register (MAR), reads that cell and stores the instruction in the instruction register (IR). Then it increments the PC so that it points to the next one.
  2. Decode: the control unit splits the IR into the operation code (what to do) and the operand (what to do it with).
  3. Execute: it performs the operation. It may read or write memory, operate in the ALU or change the PC, which is what a jump does.

The machine below is an 8-bit accumulator CPU with 16 memory cells. Each instruction takes up one byte: the upper 4 bits are the operation code and the lower 4 are the address. It has a program loaded that multiplies A × B by adding A as many times as B says, because this CPU does not know how to multiply. Step through one phase at a time and watch how the data moves.

Lab · a toy CPU

Green: the cell being read. Yellow: the one being written. Blue: where the PC points.

FetchDecodeExecute Instruction cycles: 0
Memory
CPU registers
Instruction set
0x1a LOAD a · ACC ← M[a]
0x2a STORE a · M[a] ← ACC
0x3a ADD a · ACC ← ACC + M[a]
0x4a SUB a · ACC ← ACC − M[a]
0x5a JMP a · PC ← a
0x6a JZ a · if Z, PC ← a
0x70 HALT · stop
What the machine shows

An instruction and a data item are indistinguishable in memory: cell 1 contains 0x3B and the CPU treats it as “ADD 11” only because the PC went through there. If the PC were to reach cell 11, which contains the number 3, it would execute it as the instruction 0x03. A jump with the wrong address does not raise an error: it executes garbage.

04Memory and its hierarchy

The unit is the bit; eight bits make a byte, which is the smallest addressable quantity in almost all processors. The word is the size the CPU works with at once: 8 bits in an AVR, 32 in an ARM Cortex-M, 64 in a PC.

With n address lines, 2n positions can be distinguished:

\[ \text{positions} = 2^n \quad 2^{16} = 65 536 \quad 2^{32} = 4 294 967 296 \] A 16-bit bus addresses 64 KiB; a 32-bit one, 4 GiB. That is why 32-bit systems could not use more than 4 GiB of RAM.
kilo is not kibi

In the International System, kilo is 1000. But memory grows in powers of 2, so “kilobyte” was used for 1024 bytes for decades. The IEC separated the two: kB = 1000 B and KiB = 1024 B; MiB = 220, GiB = 230. A “1 TB” disk has 1012 bytes, which is 931 GiB: nothing is missing, it is measured in a different unit. The SI prefix converter helps with the decimal ones.

No memory is large, fast and cheap all at once. The solution is a hierarchy: a few very fast cells close to the CPU and many slow ones far away. It works because programs have locality: they use the same data several times (temporal locality) and neighboring data (spatial locality).

LevelTypical sizeAccess timeTechnology
Registershundreds of bytes< 1 nsFlip-flops in the CPU
L1 cache32–64 KiB≈ 1 nsSRAM
L2 and L3 cacheMiB3–20 nsSRAM
Main memoryGiB60–100 nsDRAM
Solid-state drivehundreds of GBtens of µsNAND flash
Hard disk driveTB5–10 msMagnetic

These are orders of magnitude, not data from a specific model. What matters is the scale: between a register and a hard disk drive there is a factor of ten million. If a register access took one second, reading the disk would take four months. The types of memory are covered in memories and programmable devices.

05Input and output

To the CPU, a peripheral is a group of registers: one for data, one for status and one for control. There are two ways to reach them. In memory-mapped I/O the registers occupy addresses in the same space as RAM and are read and written with ordinary instructions; this is what microcontrollers do. In isolated I/O there is a separate space with its own instructions, such as IN and OUT on x86.

And there are three ways to find out when the peripheral has something:

Polling

The CPU reads the status register over and over again. Simple, but it keeps the processor busy waiting.

Interrupts

The peripheral signals it; the CPU drops what it is doing, services it and returns. See interrupts.

Direct memory access (DMA)

A controller moves blocks between the peripheral and memory without going through the CPU, which only receives the “done” notification.

06From source code to execution

The CPU only executes machine code. A C program goes through this path before it runs:

StageInputOutputWhat it does
Preprocessor.c.iResolves #include, #define and conditional compilation
Compiler.i.sTranslates C into the assembly language of the target processor
Assembler.s.oTranslates each mnemonic into its machine code
Linker.o + librariesexecutableJoins the object files and fixes the final addresses
LoaderexecutableprocessThe operating system copies it into memory and jumps to its first instruction

The operating system is the program that manages the hardware and shares it among the other programs: it decides who uses the CPU, gives each process its memory space and offers files and devices through system calls. In a small microcontroller there is no operating system: the program is the sole owner of the machine. The stages of compilation are practiced in the topic on structured programming.

07What makes a computer fast?

Clock frequency is not enough to compare processors. The time a program takes depends on three factors, and the so-called classic performance equation combines them:

\[ T = \frac{N_i \cdot \operatorname{CPI}}{f} \] Ni: instructions executed · CPI: average clock cycles per instruction · f: clock frequency.
Worked example

A program executes 2·109 instructions. On processor A, at 3 GHz, it averages 1.5 cycles per instruction; on B, at 2.5 GHz, it averages 1.2.

TA = 2·109 · 1.5 / 3·109 = 1.00 s and TB = 2·109 · 1.2 / 2.5·109 = 0.96 s.

B is faster with a clock that is 17% slower. The compiler affects Ni, the microarchitecture affects the CPI and the technology affects f: none of the three decides alone.

08In the lab

Exercise 1 · Inventory of a PC

On Windows, open the task manager (Performance tab) and on Linux run lscpu and free -h. Write down cores, frequency, size of each cache and total RAM. Locate each item in the hierarchy table. For the physical hardware, see PC maintenance.

Exercise 2 · Programming the toy CPU

On paper, using the instruction set from section 3, write a program that computes A − B and leaves the result in cell 13. Then one that computes the larger of two numbers. Encode each instruction in hexadecimal and use the machine to check how many cycles it takes.

Exercise 3 · Measuring locality

Traverse a 4000 × 4000 integer matrix in C, first by rows and then by columns, measuring the time with clock(). Explain the difference in terms of spatial locality and the way the matrix is organized in memory, which is covered in complex data containers.

09Common mistakes

  • Confusing address and contents. Cell 13 is not “worth 13”: it is worth whatever is stored in it.
  • Believing that more GHz is always faster. The CPI and the number of instructions weigh as much as the clock.
  • Mixing up kB and KiB and concluding that “memory is missing.”
  • Thinking that RAM only stores data. The program being executed is also there.
  • Forgetting that the PC has already been incremented when the instruction executes: that is why a relative jump is counted from the next instruction.

10Self-assessment

What is a stored program and what advantage did it bring?

It means keeping the instructions in memory, as data. It allows changing programs without rewiring the machine and makes it possible for one program (a compiler, a loader) to generate or load others.

How many positions does a 20-bit bus address? How much memory is that, if each position is one byte?

220 = 1,048,576 positions: 1 MiB. It was the limit of the original 8086.

Which register changes in every fetch, without exception?

The program counter, which is incremented to point to the next instruction. The IR is also always loaded.

How does the CPU implement a jump?

By writing a new address into the PC during execution. The next fetch brings in the instruction from there.

Why does the memory hierarchy work?

Because of the locality of programs: most accesses fall on data used recently or close to it, which is already in the fast levels.

A processor executes 5·108 instructions with a CPI of 2 at 1 GHz. How long does it take?

T = 5·108 · 2 / 109 = 1 s.

What distinguishes the Harvard architecture from the von Neumann one?

Harvard has separate memories and buses for instructions and data, and can access both at the same time. Von Neumann shares a single memory and a single path.

11Further reading

  • Andrew S. Tanenbaum and Todd Austin. Structured Computer Organization. 4th ed. (Spanish edition, “Organización de computadoras”), Pearson Educación, 2000. The book of the “stack of machines”: it is organized layer by layer, from digital logic to the operating system.
  • David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface. 4th ed. (Spanish edition, “Estructura y diseño de computadores”), Reverté, 2011. Chapter 1 develops the performance equation; the one on the memory hierarchy is the reference for the topic.
  • William Stallings. Computer Organization and Architecture. 7th ed. (Spanish edition, “Organización y arquitectura de computadores”), Pearson Prentice Hall, 2006. Buses, the instruction cycle and input/output in great detail.
  • Charles Petzold. Code: The Hidden Language of Computer Hardware and Software. 2nd ed., Microsoft Press, 2022. It builds a computer from relays and gates up to the stored program. It reads like a novel.
Development of the topic “Structure of a computer system” of Computer Science I (Level 1), based on the curriculum of the UTN Electronic Engineering program, 2023 curriculum — Ordinance No. 1849 of the UTN Higher Council. Back to the Topic Map · catto.ar