Applications with logic gates
This is where everything comes together: a problem stated in plain words becomes a truth table, is simplified with Karnaugh, gets a schematic, is built on a breadboard and ends up as a soldered circuit board. It is the topic where the subject turns into shop work.
01The digital design method
Every problem in this unit is solved with the same sequence. It pays to always go through all of it, even when the circuit looks obvious: that is what keeps you from remaking a circuit board.
| Step | What you do | Result |
|---|---|---|
| 1 | Read the problem statement and define the inputs and outputs, with a name and a meaning for each level. | List of variables |
| 2 | Build the complete truth table, in binary order. | 2n rows |
| 3 | Transfer it to a Karnaugh map. | Map |
| 4 | Group the cells and write the minimal expression. | Boolean equation |
| 5 | Choose the actual ICs and check how many gates are left free. | Bill of materials |
| 6 | Draw the schematic with pin numbers. | Drawing |
| 7 | Build it on a breadboard and check it against the truth table. | Prototype |
| 8 | Design and fabricate the circuit board. | Finished PCB |
Fabricating a circuit board takes an entire class session and cannot be undone. Every circuit is tested first on a breadboard, truth table in hand, checking off row by row. A mistake that costs thirty seconds on the breadboard costs you the whole board.
02Karnaugh maps
Simplifying with Boolean laws works, but you have to spot the right grouping. The Karnaugh map turns that search into something visual: terms that can be combined end up physically next to each other.
How to build one
It is the same truth table, redrawn in two dimensions. The key is that the labels are not in binary order but in Gray code: 00, 01, 11, 10. From one cell to its neighbor only one variable changes, and that is why that variable drops out when you group them.
The grouping rules
- You group only 1s (to get a sum of products).
- Group sizes are a power of 2: 1, 2, 4, 8, 16. Never 3 or 6.
- Groups must be rectangular and made up of adjacent cells.
- Make the groups as large as possible: each doubling in size eliminates one more variable.
- Groups may overlap. A single 1 can belong to several groups.
- The map wraps around on itself: the first column is adjacent to the last one, and the first row to the last. The four corners form a valid group of 4.
- You are done when every 1 is covered by at least one group, using as few groups as possible.
Each group yields a product term: write only the variables that do not change within the group, uncomplemented if they are 1 and complemented if they are 0. Then add all the product terms together.
A group of 2 cells → 1 variable is eliminated. A group of 4 → 2 are eliminated. A group of 8 → 3 are eliminated. That is why it always pays to form the largest group you can, even if it means overlapping.
Don't-care conditions
Sometimes there are input combinations that will never occur. For example, in a BCD decoder the combinations 1010 through 1111 do not represent any digit. In the table they are marked with X, and on the map you can take them as 1 if that helps enlarge a group, or ignore them as 0 if they add nothing. It is the tool that simplifies the most in practice.
🔢 Karnaugh circuit builder Enter your truth table and the map builds itself, with the groups marked by color, the minimal simplification by Quine–McCluskey (with don't cares), and the resulting AND-OR schematic plus the ICs needed. ›03Worked project · Combination lock
Four switches (A, B, C, D). The lock opens only with the combination A = 1, B = 0, C = 1, D = 1. In addition, if someone sets all four switches to 1, an alarm must sound. Design the circuit.
Step 1 · Variables
- Inputs: A, B, C, D (1 = switch up).
- Outputs: AB (opens, 1 = energize the solenoid) and AL (alarm).
Step 2 · Direct expressions
Each output is 1 in a single row, so there is nothing to simplify: each one is a single product term (a minterm).
Step 3 · ICs
The 74LS21 contains two 4-input ANDs: just enough. The inverter comes from a 74LS04 (or from a NAND gate of the 74LS00 with its inputs tied together, if there is no 04 in the shop). The output cannot drive a solenoid directly: you need a transistor with its flyback diode, a topic covered in Bipolar junction transistors.
Step 4 · A realistic improvement
As it stands, someone trying combinations at random succeeds in 8 attempts on average. A typical improvement to the project: add an SR latch that, on any wrong combination with at least one switch up, latches into the alarm state until it is cleared with a RESET pushbutton. That brings sequential logic into the project.
04Worked project · Vehicle alarm
A car has three sensors: P = door open, C = key in the ignition, L = lights on. The buzzer must sound when:
- the door is open and the key is in the ignition (the key was left in), or
- the door is open and the lights are on (the lights were left on).
| P | C | L | Z | Situation |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | Car locked and off |
| 0 | 0 | 1 | 0 | Lights on but door closed: driving |
| 0 | 1 | 0 | 0 | Driving |
| 0 | 1 | 1 | 0 | Driving at night |
| 1 | 0 | 0 | 0 | Getting out, all fine |
| 1 | 0 | 1 | 1 | Lights left on |
| 1 | 1 | 0 | 1 | Key left in |
| 1 | 1 | 1 | 1 | Both left |
Unsimplified sum of products: Z = P·C̅·L + P·C·L̅ + P·C·L. Grouping on the map (the three 1s sit together in the P = 1 half) leaves two groups of two:
The factored form P·(C + L) reads just like the original statement: “it sounds if the door is open and the key is in or the lights are on.” When the simplified expression can be read aloud in plain language, that is a good sign the design was set up correctly.
05Worked project · Electronic die
It is the most classic Year 4 capstone project because it uses everything: an oscillator, a counter and a combinational decoding network.
The interesting part is the combinational network. The seven LEDs of a die are not independent: by symmetry they light up in four groups, which greatly reduces the logic.
| Value | Center (1 LED) | Diagonal A (2) | Diagonal B (2) | Sides (2) |
|---|---|---|---|---|
| 1 | ON | — | — | — |
| 2 | — | ON | — | — |
| 3 | ON | ON | — | — |
| 4 | — | ON | ON | — |
| 5 | ON | ON | ON | — |
| 6 | — | ON | ON | ON |
From 7 logic functions you go down to 4. And with the combinations 110 and 111 declared as don't care (the counter never gets there), the Karnaugh maps simplify even further. It is the ideal exercise for practicing don't-care conditions.
06From schematic to circuit board
This topic touches printed circuit design for the first time; it is developed in depth in Computing for Electronics II (Year 5). Here the interest is the complete path, in its shop-floor version.
| Stage | What you do | Precautions |
|---|---|---|
| 1 | Schematic with the real pin numbering of each IC. | Do not forget to draw VCC, GND and the decoupling capacitors. |
| 2 | Routing the copper: place the components and lay out the traces. | Power traces wider (1.5 mm) than signal traces (0.8 mm). Minimum spacing between traces: 0.5 mm. |
| 3 | Printing the copper layout on glossy paper with a laser printer (mirrored). | Do not economize on toner. If the print comes out gray, the transfer fails. |
| 4 | Heat transfer with a clothes iron onto the clean copper-clad board. | Sand and degrease the copper with alcohol beforehand. Hot iron, even pressure, 3 to 5 minutes. |
| 5 | Chemical etching with ferric chloride. | Gloves and safety goggles. Ferric chloride stains permanently and attacks metals. Never pour it down the sink: neutralize it and dispose of it as special waste. |
| 6 | Drilling with a 0.8 mm bit (components) and a 1 mm bit (terminals). | Keep the bit perpendicular. 0.8 mm bits break at the slightest provocation. |
| 7 | Soldering with 60/40 solder and a 30 W soldering iron. | Heat the lead and the pad, then apply the solder. A cold joint (dull and ball-shaped) is the most common defect. |
| 8 | Checking with a multimeter in continuity mode, before powering up. | Look for solder bridges between neighboring pads and for broken traces. |
- Ferric chloride: nitrile gloves, safety goggles, ventilation. If it touches the skin, wash with plenty of water. Do not mix it with other chemicals.
- Soldering iron: 350 °C at the tip. Always in its stand, never on the bench. Rosin fumes get inhaled: work with an extractor or an open window.
- Drill: always wear safety goggles. Thin bits break and fly off.
- Leaded solder: wash your hands when you finish, and do not eat at the workbench.
Sockets: the habit that saves projects
It pays to solder sockets (DIP sockets) and insert the ICs afterward. Soldering an IC directly exposes it to 350 °C, and if it burns out or has to be replaced, desoldering a 14-pin DIP without ruining the board is very difficult. The socket costs pennies.
07Good assembly practices
- Red for +V, black for ground. No exceptions.
- Short wires lying flat: long arching wires act as antennas and snag.
- ICs straddle the center channel, with the notch always facing the same way.
- A 100 nF capacitor next to each IC.
- Build and test block by block, not everything at once.
- First measure the supply at the IC pins, not at the power supply.
- Follow the signal from the input toward the output, not the other way around.
- Compare against the truth table, row by row.
- If an output sits at an intermediate value (1.5 V), there is a conflict: two outputs tied together or a floating input.
- Replace one component at a time and measure again.
08Self-assessment
Why are the columns of a Karnaugh map labeled 00, 01, 11, 10 and not in binary order?
So that between two neighboring cells only one variable changes (Gray code). That is precisely the condition that allows you to group them and eliminate that variable. With normal binary order (00, 01, 10, 11), adjacency breaks between the second and third columns.
Can you form a group of 6 cells on a Karnaugh map?
No. Groups are always powers of 2: 1, 2, 4, 8 or 16. A set of 6 ones is covered with a group of 4 and another of 2, overlapping them if that helps.
What is a don't-care condition and why is it worth taking advantage of?
It is an input combination that can never occur in the real system (for example, 1010 through 1111 in a BCD decoder). It is marked with X and on the map it can be taken as 1 if that lets you enlarge a group, which reduces the circuit without changing its useful behavior.
In the car alarm, why is the form P·(C + L) preferable to P·C + P·L?
It uses one AND and one OR (2 gates) instead of two ANDs and one OR (3 gates). It also reads the same as the problem statement, which makes it easier to verify that the design is correct. Karnaugh gives you the sum-of-products form; factoring afterward is an extra step that sometimes saves a gate.
Why do you solder sockets instead of soldering the ICs directly?
Because soldering the IC subjects it to 350 °C, and because desoldering a 14- or 16-pin DIP without lifting the copper pads is very difficult. With a socket, replacing a burned-out IC takes ten seconds.
What do you measure with the multimeter before powering up a freshly soldered board?
Continuity: that there are no solder bridges between neighboring pads (above all between VCC and GND) and that the traces really do run from one end to the other. A short between supply and ground burns out the power supply or the IC within the first second.
A 4-input circuit has a 1 in the four corners of the map and 0 elsewhere. What is the minimal expression?
The four corners are adjacent to each other (the map wraps around in both directions), so they form a single group of 4. With rows AB and columns CD, the corners are AB = 00 or 10 and CD = 00 or 10, that is, B = 0 and D = 0: S = B̅ · D̅.