Schematic circuit diagrams
The schematic is the parent document of an electronics project: the board, the bill of materials, the cost estimate and the repair instructions all come from it. A clear schematic saves weeks; a confusing one costs them.
01What it represents and what it does not
A schematic says what is connected to what. It does not say where each component goes, how long a wire is, or how big the circuit board is. Two schematics drawn in very different ways can describe exactly the same circuit, and the software knows it: internally both generate the same netlist.
Hence the freedom to draw it in the most readable way, which is the only criterion that matters.
02Rules for making it understandable
- Signal from left to right: input on the left, output on the right.
- Power rails at the top and ground at the bottom, always.
- One functional block per area, with a title if the schematic is large.
- Net labels with names that mean something: RESET, TX, VBAT.
- Decoupling capacitors next to the IC they supply.
- Margin notes for whatever the drawing cannot express: “adjust R7 to 2.5 V,” “mount on heatsink.”
- Crossing lines unnecessarily, or using little “hop-over” arcs at the crossings: today this is solved with labels.
- Joining four lines at a single point: with a junction dot, the node is ambiguous. Make two separate T junctions instead.
- Drawing the IC with its pins in physical order if that tangles the schematic.
- Leaving nets unnamed and then hunting for them by color.
- Using the same label spelled two different ways:
VCCandVcccan be two different nets for the software.
Two lines that cross without a dot are not connected; with a dot, they are. This is a universal convention and the source of half the reading errors on a printed schematic, especially if the resolution is low. That is why good practice is to avoid crossings and not depend on the dot.
Hierarchy and buses
A large project does not fit on one sheet. It is divided into blocks —power supply, input, control, outputs— each on its own sheet, with ports that connect them. The top sheet shows the block diagram and each block opens separately.
A set of related signals —D0 to D7, A0 to A15— is drawn as a single thick line, with the signals entering and leaving by name. It saves dozens of parallel lines and makes the schematic much more readable.
03Symbol, footprint and model
Every component in the project has three different representations that must be kept consistent. This is where beginners’ designs fail most often.
What you see in the schematic. It defines how many pins the part has, what they are called and what type they are (input, output, power, bidirectional).
The pattern of copper and holes on the board: the actual physical shape of the component. A single symbol can have many footprints: the same transistor comes in TO-92, TO-220 or SOT-23.
It is used to check heights and clearances against the enclosure, and is exported to mechanical CAD.
It is the most expensive error in board design, because it is not discovered until the manufactured boards arrive. Before sending the design to fabrication:
- Compare the footprint with the dimensional drawing in the datasheet, millimeter by millimeter.
- Print the board at 1:1 scale and place the real components on top. It takes a minute and catches almost every error.
- Confirm the pin numbering: a TO-92 has three legs and at least three different pin orders depending on the manufacturer and the part.
- Check the orientation of connectors and polarized components: the pin 1 mark has to be on the silkscreen.
04Electrical rules checking
The ERC (electrical rules check) examines the schematic for inconsistencies, using the declared type of each pin. It does not understand circuits: it understands rules. Even so, it catches most careless errors.
| Warning | What it means | What to do |
|---|---|---|
| Unconnected pin | An input was left floating | Connect it, or explicitly mark it “no connect” if intentional. In CMOS, never leave it floating. |
| Two outputs tied together | Two output pins on the same net | It is a short circuit when one drives high and the other low. It is only valid with open-collector or tri-state outputs. |
| Power pin with no source | There are VCC pins but nothing that drives them | Add a power source symbol or mark the net as powered by a connector (PWR_FLAG in KiCad). |
| Single-pin net | A label that does not match any other | Almost always a typo in the net name. |
| Duplicate reference designators | Two R7s in the same schematic | Renumber automatically. |
| Symbol with no footprint assigned | The component cannot be transferred to the board | Assign the correct footprint, checking it against the datasheet. |
It does not know whether the base resistor is too large, whether the filter capacitor is big enough or whether the transistor will saturate. The electrical check is about consistency of the drawing, not of the design. That is what calculation, simulation and the prototype are for.
05What comes out of the schematic
| Document | What it contains | Who it is for |
|---|---|---|
| Netlist | The list of nets with all their pins | The PCB software. It is the bridge between schematic and board. |
| BOM (bill of materials) | Reference designator, value, footprint, quantity, supplier part number | Purchasing and assembly. It is generated automatically from the schematic. |
| Schematic as PDF | The drawing with its title block and revision | Documentation, repair, presentation |
| Design notes | Criteria, calculations, values to adjust | Whoever picks the project up a year from now, who will probably be yourself |
Every schematic carries a revision number and a date in the title block, and a line saying what changed. Without that, as soon as two versions are circulating nobody knows which one matches the board on the bench, and more time is lost finding out than in the whole design.
| Tool | Note |
|---|---|
| KiCad | Free, open source and full-featured. It is the standard in education and increasingly in industry. Runs on Windows, Linux and Mac. |
| EasyEDA | In the browser, with a huge library tied to a supplier. Very handy for getting started. |
| Eagle | Historic and widely used; now integrated into Fusion 360. |
| Proteus | Its strength is simulating the circuit, even with the microcontroller running the program. |
| Altium | Professional, expensive and powerful; the standard in high-volume industry. |
06In the lab
Take the regulated power supply with the LM317 already studied and draw it completely in the chosen software: symbols, values, reference designators, net labels and title block. Run the ERC until no warnings remain and export the PDF.
The teacher hands out a schematic with five planted errors —a floating pin, a misspelled label, a reversed electrolytic capacitor, two repeated reference designators and a wrong footprint—. Look for them first by eye, write them down, and only then run the ERC to compare what each one found.
Draw a simple circuit twice: once following the readability rules (signal from left to right, power at the top) and once in a rush. Generate both netlists and compare them: they are identical. This shows that readability is not for the machine, it is for people.
Create the symbol and footprint of a component that is not in the library, assign it, and generate the complete bill of materials of the project with quantities and part numbers. Get a quote from a local supplier: that is where the project stops being a drawing and acquires a price.
07Common mistakes
| Symptom | Usual cause |
|---|---|
| The board is missing connections that are in the schematic | Lines that look like they touch but are not joined: they were drawn on top of each other without the software creating the junction. |
| Two nets that should be one | Labels spelled differently: VCC and Vcc, or with a trailing space. |
| The component does not fit on the manufactured board | Wrong footprint, or one not checked against the datasheet. |
| The IC was inserted backwards | The pin 1 mark is not on the silkscreen, or the footprint places it wrongly. |
| The ERC reports nothing and the circuit does not work | The ERC checks consistency, not design. Nothing replaces calculation and the prototype. |
| The BOM does not match what was assembled | A value was changed on the board and not in the schematic. The schematic is always the source: fix it there and regenerate everything. |
| Nobody knows which version is the good one | The revision and date are missing from the title block. |
08Self-assessment
What information does a schematic carry, exactly?
The connectivity: which pins are joined together, with which components and with which values. It does not carry position, size or conductor length.
What is a netlist and what is it for?
The listing of all the nets of the circuit with the pins that belong to each one. It is what the PCB software reads to know what it must connect: the bridge between the schematic and the board.
What is the difference between a symbol and a footprint?
The symbol is the representation in the schematic and defines the pins; the footprint is the physical pattern of copper and holes on the board. A single symbol can have several footprints depending on the package.
Why may two crossed lines be connected or not?
Because the connection is indicated by the junction dot. Without a dot, the lines cross without touching. Since the dot can get lost in a low-quality printout, it is best simply to avoid crossings by using net labels.
The ERC warns “power pin with no source.” What is going on?
There are power pins on the net but no element that supplies it. This is normal when the power comes from an external connector: it is resolved by marking that net with the appropriate power flag.
Why is it sometimes valid to tie two outputs together?
Only if they are open-collector or tri-state: in the first case each output can pull the net to zero but not to one, and in the second only one is active at a time. With ordinary totem-pole outputs, tying them together is a short circuit.
What is drawing with hierarchical sheets good for?
To keep a large project readable: each functional block on its own sheet, with defined ports, and a top sheet that shows how they relate. It also makes it possible to reuse a complete block in another project.
How do you verify a footprint before sending the design to fabrication?
By comparing it with the dimensional drawing in the datasheet, and printing the board at 1:1 scale to place the real components on top.
A resistor was changed on the circuit board. Where is that recorded?
In the schematic, which is the source of everything: the BOM, the netlist and the PDF are regenerated from it, and the revision number is incremented. Recording it only on the board guarantees that the next production run comes out with the old value.
What does it mean when two differently drawn schematics generate the same netlist?
That they are the same circuit. The difference lies in readability for people, which is precisely the criterion to draw by.